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VHDL Implementation of FIFO Buffer

At the register level design components such as decoders, counters, comparators, arithmetic operators, and other are used to design various digital systems. A FIFO buffer is one of the register level components, which can be used to synchronize two different timing devices. Also, it can be used to boost the signal strength of an incoming signal. FIFO buffer can be found in cache controllers, peripheral communication devices, microprocessors, and many other digital devices.

Photovoltaic System Controller Modeling

There are four key components in a solar power system (1) solar panels (2) solar (charge) controller (3) battery and (4) inverter. The solar panel are photovoltaic cells which are made up of silicon. Silicon becomes electrically charged when exposed to sunlight [1]. Thus, solar panels charge the battery. The charge controller ensures that battery is not overcharged. The inverter converts the DC electrical energy from the battery to AC electrical energy commonly used in the home. The project scope was to develop a hardware software co-description for a solar controller using SystemC.

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